...from Preet
Hello Kemmi,
Yes there are a number of devices that have LVDS outputs. The LVDS standard defined under ANSI/TIA/EIA-644-A is an electrical standard only defining driver output characteristics and receiver input characteristics. Guidelines are also given on bus configuration, cables, and termination. Protocol, connectors, and bus structure are not defined in this standard, as they are application dependent.
Therefore, devices that have standard LVDS outputs should be able to communicate with other devices that accept LVDS inputs. There are cases such as SERDES which can have proprietary encoding schemes where a matched Serializer and Deserializer pair is required to complete the communication. For cases such as these, NSC puts the matched SERDES on the same datasheet.
The following are some basic recommendations to follow when designing with LVDS devices:
a) Use at least 4 PCB board layers (top to bottom): LVDS signals, ground, power, TTL signals. Dedicating planes for VCC and Ground are typically required for high-speed design. A solid ground plane is required to establish a controlled (known) impedance for the transmission line interconnects. Narrow spacing between power and ground planes will also create an excellent high frequency bypass capacitance.
b) Isolate fast edge rate CMOS/TTL signals from LVDS signals, or they may couple crosstalk onto the LVDS lines. It is best to put TTL and LVDS signals on a different layer(s) which should be isolated by the power and ground planes.
c) Keep drivers and receivers as close to the (LVDS port side) connectors as possible. This helps to ensure that the differential lines do not pick up noise generated from the board, which can result in higher EMI. This recommendation also helps to minimize skew between the lines.
d) Bypass each LVDS device and also use distributed bulk capacitance. Surface mount capacitors placed close to power and ground pins work best.
e) Power and ground traces should be wide (low impedance) traces. Do not use 50
Ω design rules for power and ground traces. Their function is to be a low impedance path.f) Keep ground PCB return paths short and wide. Provide paths that create the smallest return loop for image currents.
g) Systems connected through cables should provide a common ground wire between the systems. This provides a short known path for common-mode currents to return.
h) Use two vias to connect bypass capacitor pads to power and ground planes. This minimizes inductance effects. Surface mount capacitors are recommended since they are compact and can be located close to device pins.
Regards,
Preet
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